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  • ICM7218 Interfacing

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    Vivek Roy
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    On-chip sequential RAM accepts only the aforesaid writing sequence. It updates the contents of the sequential RAM locations only after eight bytes are successfully transferred to the display controller. The data bus of the display controller is driven by port A of the second 82C55A.

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    On-chip sequential RAM accepts only the aforesaid writing sequence. It updates the contents of the sequential RAM locations only after eight bytes are successfully transferred to the display controller. The data bus of the display controller is driven by port A of the second 82C55A.

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    154 views5 pages

    ICM7218 Interfacing

    Uploaded by

    Vivek Roy
    On-chip sequential RAM accepts only the aforesaid writing sequence. It updates the contents of the sequential RAM locations only after eight bytes are successfully transferred to the display controller. The data bus of the display controller is driven by port A of the second 82C55A.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as PPT, PDF, TXT or read online from Scribd
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    of 5

    ICM 7218 Display Controller First set mode = 1 and write the controller configuration data.

    . Then set mode = 0 and write eight bytes of display data. On-chip sequential RAM accepts only the aforesaid writing sequence. It updates the contents of the sequential RAM locations only after eight bytes are successfully transferred to the display controller. The data bus of the display controller is driven by port A of the second 82C55A. Mode and _WR are driven by PC0 and PC1 of the second 82C55A.

    Writing on ICM 7218 Sequential RAM Configure the second 82C55A with port A and C_lower as output ports; port B and C_upper as input ports. Select Code B decoder. Obtain measurement data (in packed BCD format) from SRAM locations 8000H to 8003H. Generate display data (in unpacked BCD format with leading zeros) from the measurement data and store them in SRAM locations 9000H to 9007H. OR 80H with each unpacked data to turn off the decimal point. Copy the display data from SRAM locations to 7218 sequential RAM.

    Assembly Language Code (pg 1)


    ORG 0000h ;Configure the second 82C55A MVI A, 8Ah OUT FBh ; Set mode = 1 MVI A, 01h OUT FBh ; Set _WR = 1 MVI A, 03h OUT FBh ; Write 7218 configuration data MVI A, 90h OUT F8h ; Generate _WR pulse MVI A, 02h OUT FBh MVI A, 03h OUT FBh ; Generate display data LXI H, 8000h LXI B, 9000h L1:MOV A,M ANI 0Fh ORA 80h STAX B INX B MOV A,M ANI F0h RLC RLC RLC RLC ORA 80H STAX B

    Assembly Language Code (pg 2)


    INX B INX H MOV A, L CPI 04h JNZ L1 ; Set mode = 0 MVI A, 00h OUT FBh ; Write display data to 7218 RAM LXI H, 9000h L2: MOV A,M OUT F8h MVI A, 02h OUT FBh MVI A, 03h OUT FBh INX H MOV A, L CPI 08h JNZ L2 ; Set mode = 1 MVI A, 01h OUT FBh HLT

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